From 87e1938b3a0c7c7535085c4e1d1d5d5fde273688 Mon Sep 17 00:00:00 2001 From: ha7ilm Date: Sat, 29 Nov 2014 13:56:56 +0100 Subject: [PATCH] added ddc_transition_bw() --- README.md | 6 ++++++ config_webrx.py | 2 +- plugins/__init__.pyc | Bin 144 -> 130 bytes plugins/dsp/__init__.pyc | Bin 148 -> 134 bytes plugins/dsp/csdr/__init__.pyc | Bin 156 -> 139 bytes plugins/dsp/csdr/plugin.py | 8 ++++++-- plugins/dsp/csdr/plugin.pyc | Bin 6778 -> 6788 bytes 7 files changed, 13 insertions(+), 3 deletions(-) diff --git a/README.md b/README.md index ae724c3..5a3c5ad 100644 --- a/README.md +++ b/README.md @@ -47,6 +47,12 @@ The filter envelope can be dragged at its ends and moved around to set the passb However, if you hold the shift key, you can drag the center line (BFO) or the whole passband (PBS). +## Configuration tips + +If you want to run OpenWebRX on a remote server instead of localhost, do not forget to set *server_hostname* in `config_webrx.py`, or you may get a WebSocket error. + +DSP CPU usage can be fine-tuned in `plugins/dsp/csdr/plugin.py`: you can set transition bandwidths higher (thus degrade filter performance by decreasing the length of the kernel, but also decrease CPU usage). + ## Todo Currently, clients use up a lot of bandwidth. This will be improved later. diff --git a/config_webrx.py b/config_webrx.py index 2565f54..230e349 100755 --- a/config_webrx.py +++ b/config_webrx.py @@ -53,7 +53,7 @@ center_freq = 145525000 rf_gain = 5 start_rtl_thread=True #rtl_sdr is more stable than rtl_tcp... -start_rtl_command="rtl_sdr -s {samp_rate} -f {center_freq} - | nc -vvl 127.0.0.1 8888".format(rf_gain=rf_gain, center_freq=center_freq, samp_rate=samp_rate) +start_rtl_command="rtl_sdr -s {samp_rate} -f {center_freq} - | nc -vvl 127.0.0.1 -p 8888".format(rf_gain=rf_gain, center_freq=center_freq, samp_rate=samp_rate) #start_rtl_tcp_command="rtl_tcp -s 250000 -f 145525000 -g 0 -p 8888" #You can use other SDR hardware as well, but if the command above outputs samples in a format other than [unsigned char], then the dsp plugin has to be slightly modified (at the csdr convert_u8_f part). diff --git a/plugins/__init__.pyc b/plugins/__init__.pyc index d84020a8aafa5ed8b81c5ef7ca1a2c3e5cb066c6..9bf18b7b410a696c0f62293c72349241942d43a7 100644 GIT binary patch delta 47 zcmbQh*u==e{F#?a*dxzkB8RE8HUk5Lenx(7s(wG2Qc=akG%Wxl C(hd0l delta 61 zcmZo-oWRJz{F#?)dT>t2L=IC;O9lo8{fzwFRQ-bFv>biM;;NFw9R1>|#O##(^hEvq Qg4De7)TE*c!-)}E06EVT9smFU diff --git a/plugins/dsp/__init__.pyc b/plugins/dsp/__init__.pyc index 7dc2093abf01c40966a1362737984ba224f467ff..21c02f917a9ecb44bfe7673b9d3a19a9577b7995 100644 GIT binary patch delta 47 zcmbQj*v81g{F#?a*dxzkB8RE8J_7@Tenx(7s(wG2Qc=akG(7+% Cz77ch delta 61 zcmZo;oWjV#{F#?)dT>t2L=IC;TLuOO{fzwFRQ-bFv>biM;;NFw9R1>|#O##(^hEvq Qg4De7)TE*c!-)}k06b$9E&u=k diff --git a/plugins/dsp/csdr/__init__.pyc b/plugins/dsp/csdr/__init__.pyc index 7f0bd13c6f8c07fc9d65ee9403809c44829c854d..a87e61821446bfc2c08f6ba1680a9b19a746c08c 100644 GIT binary patch delta 64 zcmbQk*v-hn{F#?a*dxzkB8RDt2?GOzenx(7s(wG2Qc;C|K~8CU TW?r#=N^yaHa&b!0#405KRk9Se delta 81 zcmeBXoWsb${F#?)dT>t2L=ID1R|WbiM;;NFw9R1>|#O##(^hEvq kg4De7)TE*cL;ZrB()7%{V*Qlj0{w!b{N&W);)$6`04*;ZF#rGn diff --git a/plugins/dsp/csdr/plugin.py b/plugins/dsp/csdr/plugin.py index 511c962..c3c79f1 100644 --- a/plugins/dsp/csdr/plugin.py +++ b/plugins/dsp/csdr/plugin.py @@ -14,8 +14,9 @@ class dsp_plugin: self.low_cut = -4000 self.high_cut = 4000 self.bpf_transition_bw = 300 #Hz, and this is a constant + self.ddc_transition_bw_rate = 0.15 # of the IF sample rate self.running = False - chain_begin="nc localhost 4951 | csdr convert_u8_f | csdr shift_addition_cc --fifo {shift_pipe} | csdr fir_decimate_cc {decimation} 0.005 HAMMING | csdr bandpass_fir_fft_cc --fifo {bpf_pipe} {bpf_transition_bw} HAMMING | " + chain_begin="nc localhost 4951 | csdr convert_u8_f | csdr shift_addition_cc --fifo {shift_pipe} | csdr fir_decimate_cc {decimation} {ddc_transition_bw} HAMMING | csdr bandpass_fir_fft_cc --fifo {bpf_pipe} {bpf_transition_bw} HAMMING | " self.chains = { "nfm" : chain_begin + "csdr fmdemod_quadri_cf | csdr limit_ff | csdr fractional_decimator_ff {last_decimation} | csdr deemphasis_nfm_ff 48000 | csdr fastagc_ff | csdr convert_f_i16", "am" : chain_begin + "csdr amdemod_cf | csdr fastdcblock_ff | csdr fractional_decimator_ff {last_decimation} | csdr agc_ff | csdr limit_ff | csdr convert_f_i16", @@ -85,6 +86,9 @@ class dsp_plugin: pass os.mkfifo(path) + def ddc_transition_bw(self): + return self.ddc_transition_bw_rate*(self.if_samp_rate()/float(self.samp_rate)) + def start(self): command_base=self.chains[self.demodulator] @@ -99,7 +103,7 @@ class dsp_plugin: self.mkfifo(self.shift_pipe) #run the command - command=command_base.format(bpf_pipe=self.bpf_pipe,shift_pipe=self.shift_pipe,decimation=self.decimation,last_decimation=self.last_decimation,fft_size=self.fft_size,fft_block_size=self.fft_block_size(),bpf_transition_bw=float(self.bpf_transition_bw)/self.if_samp_rate()) + command=command_base.format(bpf_pipe=self.bpf_pipe,shift_pipe=self.shift_pipe,decimation=self.decimation,last_decimation=self.last_decimation,fft_size=self.fft_size,fft_block_size=self.fft_block_size(),bpf_transition_bw=float(self.bpf_transition_bw)/self.if_samp_rate(),ddc_transition_bw=self.ddc_transition_bw()) print "[openwebrx-dsp-plugin:csdr] Command =",command #code.interact(local=locals()) self.process = subprocess.Popen(command, stdout=subprocess.PIPE, shell=True) diff --git a/plugins/dsp/csdr/plugin.pyc b/plugins/dsp/csdr/plugin.pyc index 4e0345fa8fdcaec6b438762bdff219092d99be10..d0817cb453574487f4f54d38c697ae543b5fa092 100644 GIT binary patch delta 2462 zcmbVO&u<%55T0izw%3k-#daJ!Zj-bDoHk_vrwLXCp-CV?rGdU66)L1voZS?siEZqy z+UAFHNRSX9p)&VMNO0-_q)JF!kb2}VfF3~HK|+WF5(i*r7B`2Y#!008H1F-qw{PZs zGtOV*duN0GKceA(zP)uj_@TOY`_sEoyBGEVuB1UP7E^d$Wz++_tS;=>25bRXA#gn- z40af{6;!)mOMxAMtla|>Y(~k9d1jo<1WedTAleCzj{v!`(F1l$j40eX32qEl<6x)3 z&WN1=yYD|^SNYWCTDk|6Qg#;R=4%SxvH=#0{W#_ui(Ccy`+2JM6JGIcq&97P*>amp zwN}-w)@xSf#`e7jzQ27ci9d92Aih^mx#EEJLh-ABU1^81IDU#*cA~BGAm! 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