Now the DBPSK decoder gets it right!

This commit is contained in:
ha7ilm 2017-05-18 18:48:08 +02:00
parent 98c4d0f662
commit d97c1dce20

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@ -97,12 +97,8 @@ class dsp:
"csdr simple_agc_cc 0.001 0.5 | " + \ "csdr simple_agc_cc 0.001 0.5 | " + \
"CSDR_FIXED_BUFSIZE=256 csdr tee /s/tr_input | " + \ "CSDR_FIXED_BUFSIZE=256 csdr tee /s/tr_input | " + \
"csdr timing_recovery_cc GARDNER {secondary_samples_per_bits} 0.5 2 --add_q | " + \ "csdr timing_recovery_cc GARDNER {secondary_samples_per_bits} 0.5 2 --add_q | " + \
"CSDR_FIXED_BUFSIZE=1 csdr tee /s/costas_input | CSDR_FIXED_BUFSIZE=1 csdr bpsk_costas_loop_cc 0.1 0.707 --dd --output_combined /s/costas_error /s/costas_dphase /s/costas_nco | CSDR_FIXED_BUFSIZE=1 csdr tee /s/costas_output | " + \ "CSDR_FIXED_BUFSIZE=1 csdr dbpsk_decoder_c_u8 | " + \
"CSDR_FIXED_BUFSIZE=1 csdr realpart_cf | " + \
"CSDR_FIXED_BUFSIZE=1 csdr binary_slicer_f_u8 | " + \
"CSDR_FIXED_BUFSIZE=1 csdr differential_decoder_u8_u8 | " + \
"CSDR_FIXED_BUFSIZE=1 csdr psk31_varicode_decoder_u8_u8" "CSDR_FIXED_BUFSIZE=1 csdr psk31_varicode_decoder_u8_u8"
# "CSDR_FIXED_BUFSIZE=1 csdr bpsk_costas_loop_cc 0.3 0.707 |" + \
def set_secondary_demodulator(self, what): def set_secondary_demodulator(self, what):
self.secondary_demodulator = what self.secondary_demodulator = what